Cascaded H-Bridge Seven Level Inverter using Carrier Phase Shifted PWM with Reduced DC sources

Authors

  • Balachandra Pattanaik
  • Murugan S

DOI:

https://doi.org/10.20894/IJMSR.117.009.003.005

Keywords:

Cascaded H-Bridge multi level inverter (CHB-MLI), Multi Carrier Phase Shifted Sinusoidal Pulse Width Modulation (CPS-SPWM)

Abstract

This paper presents a multi level inverter with seven level voltage generation scheme using cascaded H-bridge MLI topology utilizing reduced number of DC sources. By utilizing switched capacitor methodology the number of DC sources required to generate seven levels is minimized. Three numbers of H-bridges are employed in seven level generations where only one dc source is used and in the remaining bridges only capacitors are used along with a unidirectional switch for capacitor charging. This paper utilizes a multi carrier PWM technique based on phase shifted carrier for generating pulses to get seven level output. This paper also discusses the switching schemes for charging switches used and there is a small dip in efficiency of this inverter due to the existence of power loss which occurs during charging and discharging the capacitors. The advantage of this inverter is it can produce an output voltage higher than the input voltage in the ratio 1:3 and also the output voltage have lesser harmonics than conventional square and quasi square wave inverters due to multilevel output voltage. The proposed multi level inverter using single DC source and three cascaded h bridges using carrier phase shifted sine PWM technique is implemented in MATLAB/Simulink platform and merits of the proposed inverter system is verified through simulations.

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Author Biographies

Balachandra Pattanaik

Associate Professor, Department of Electrical and Computer Engg. Mettu University, Ethiopia.

Murugan S

Senior Product Analyst, Research & Development Division, Embedded System, Vee Eee Technologies, Chennai, Tamilnadu, India.

References

[1] B. Chokkalingam, S. Padmanaban, P. Siano, Z. Leonowicz and A. Iqbal, "A hexagonal hysteresis space vector current controller for single Z-source network multilevel inverter with capacitor balancing," 2017 IEEE International Conference on Environment and Electrical Engineering and 2017 IEEE Industrial and Commercial Power Systems Europe (EEEIC / I&CPS Europe), Milan, 2017, pp. 1-6.

[2] T. Amir; J. Adabi; R. Mohammad, "A Multilevel Inverter Structure based on Combination of Switched-Capacitors and DC Sources," in IEEE Transactions on Industrial Informatics , vol.PP, no.99, pp.1-1

[3] Y. C. Fong, Y. Ye, S. R. Raman and K. W. E. Cheng, "A hybrid multilevel inverter employing series-parallel switched-capacitor unit," 2017 IEEE Applied Power Electronics Conference and Exposition (APEC), Tampa, FL, 2017, pp. 2565-2570.

[4] N. Y. Yagnik, H. M. Karkar, H. Y. Yagnik and I. N. Trivedi, "Single Phase Modified Multilevel Inverter in Standalone Photovoltaic System," 2016 International Conference on Electrical Power and Energy Systems (ICEPES), Bhopal, 2016, pp. 355-362.

[5] J. Zeng; J. Wu; J. Liu; H. Guo, "A Quasi-Resonant Switched-Capacitor Multilevel Inverter With Self-Voltage Balancing for Single-Phase High-Frequency AC Microgrids," in IEEE Transactions on Industrial Informatics , vol.PP, no.99, pp.1-1

[6] S. Singh and A. Gupta, "Power quality analysis of multilevel grid-interactive converter system with varying DC source and switching angle," 2016 IEEE 1st International Conference on Power Electronics, Intelligent Control and Energy Systems (ICPEICES), Delhi, 2016, pp. 1-6.

[7] N. H. Saad, A. A. El-Sattar and M. A. Gad, "Sensor less Field Oriented Control based on improved MRAS speed observer for Permanent Magnet Synchronous Motor drive," 2016 Eighteenth International Middle East Power Systems Conference (MEPCON), Cairo, 2016, pp. 991-998.

[8] B. Mahato, R. Raushan and K. C. Jana, "Modulation and control of multilevel inverter for an open-end winding induction motor with constant voltage levels and harmonics," in IET Power Electronics, vol. 10, no. 1, pp. 71-79, 1 20 2017.

[9] M. Jayabalan, B. Jeevarathinam and T. Sandirasegarane, "Reduced switch count pulse width modulated multilevel inverter," in IET Power Electronics, vol. 10, no. 1, pp. 10-17, 1 20 2017.

[10] M. A. Kumar and S. Lakshminarayanan, "Cost effective gate drive circuit for MLI with constant number of conducting switches," 2016 IEEE International Conference on Recent Trends in Electronics, Information & Communication Technology (RTEICT), Bangalore, 2016, pp. 617-622.

[11] S. A. Amamra; K. Meghriche; A. Cherifi; B. Francois, "Multilevel Inverter Topology for Renewable Energy Grid Integration," in IEEE Transactions on Industrial Electronics , vol.PP, no.99, pp.1-1.

[12] A. M. Noman, K. E. Addoweesh and K. Al-Haddad, "Cascaded multilevel inverter topology with high frequency galvanic isolation for grid connected PV system," IECON 2016 - 42nd Annual Conference of the IEEE Industrial Electronics Society, Florence, 2016, pp. 3030-3037.

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Published

2017-10-23

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Section

Articles