DESIGN OF ADVADVANCED ENCRYPTION STANDARD (AES) BASED RIJINDAEL ALGORITHM

Authors

  • Aarthi J

DOI:

https://doi.org/10.20894/IJMSR.117.006.001.005

Keywords:

Advanced Standard Encryption (AES), Substitution Bytes(S-Box), Application- Specific-Integrated-Circuit (ASIC), Area, Delay, Power (ADP).

Abstract

Advanced standard encryption standard is mainly used for various security applications. Application specific integrated circuit (ASIC) with cryptographic algorithm is generate the efficient security levels for various applications. Rijindael algorithm works with encryptions and decryptions. Encryption is transform the transformations from plain text into cipher text and decryption are performs the reverse function of encryption. Mix column and inverse mix column is one of the complicate process to perform the encryptions and decryptions. In general, there are required number of the logical elements is comparatively high for the mix column and inverse mix column process. To provide the efficient logical elements for the mix column, the enhanced inverse mix column is proposed in this paper. These works improve the logical elements utilizations as well as the power optimizations. The enhanced mix column is produce the efficient Area, Delay and Power(ADP) products for the both encryption and decryptions. 

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Author Biography

Aarthi J

Electronics and Communication Engineering, Jayaram College of Engineering and Technology, Trichy

References

[1] Viktor Fischer, Milos Drutarovsky, Pawel Chodowiec and Francois Gramain, “InvMixColumn Decomposition and Multilevel Resource Sharing in AES Implementations” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 13, No. 8, 2005.

[2] M. Anitha Christry and S. Sridevi Sathya Priya, “Design of Low Power Mixcolumn in Advanced Encryption Standard Algorithm” International Journal of Scientific & Engineering Research, Vol. 5, Issue. 4, pp: 64-68, 2014.

[3] Anitha, S., and Suganya, M., 2015. “Area optimized in storage area network using Novel Mix column Transformation in Masked AES” International Journal of Engineering Trends and Technology (IJETT), Vol. 20, No. 6, pp: 275-282.

[4] M. Senthil Kumar and S. Rajalakshmi, “Incorporation of Wave Pipelined Techniques into Composite S-Box and AES Architectures” Research Journal of Applied Sciences, Engineering and Technology (RJASET), Vol. 8, No. 15, pp: 1717-1723, 2014.

[5] Sandyarani, K., and Nirmal kumar, P., 2014. “Design of high speed AES-128 using Novel Mix Column Transformation and Sub Bytes” Journal of Computer Applications (JCA), Vol. 7, Issue. 2, pp: 57-60.

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Published

2014-12-17

Issue

Vol. 6 No. 1 (2014)

Section

Articles

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