Non-Linear Test Pattern Generation For Stuck At Fault Identification
Keywords:
VLSI, Non linear feedback shift register, stuck at fault, Xilinx ISE.Abstract
For identifying the fault the test pattern generation is the major role in VLSI design. The pseudo random generator that is linear/Non linear shift register are utilized to produce the patterns and given the circuits. In this paper Non Linear Feedback shift registers are used over Automatic Test Pattern Generation to identify the Stuck at faults which offers less power compare to the conventional method with high fault coverage. The proposed method is simulated and verified using Xilinx ISE tool.
Downloads
Download data is not yet available.
References
1. Roumeliotis SI, Sukhatme GS, Bekey GA. Sensor fault detection and identification in a mobile robot. InProceedings. 1998 IEEE/RSJ International Conference on Intelligent Robots and Systems. Innovations in Theory, Practice and Applications (Cat. No. 98CH36190) 1998 Oct 17 (Vol. 3, pp. 1383-1388). IEEE.
2. Agrawal VD, Chakradhar ST. Combinational ATPG theorems for identifying untestable faults in sequential circuits. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 1995 Sep;14(9):1155-60.
3.Veneris A, Chang R, Abadir MS, Amiri M. Fault equivalence and diagnostic test generation using ATPG. In2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No. 04CH37512) 2004 May 23 (Vol. 5, pp. V-V). IEEE.
4.Jacoby R, Moceyunas P, Cho H, Hachtel G. New ATPG techniques for logic optimization. In1989 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers 1989 Nov 5 (pp. 548-551). IEEE.
5.Liu X, Hsiao MS. A novel transition fault ATPG that reduces yield loss. IEEE Design & Test of Computers. 2005 Nov 21;22(6):576-84.
2. Agrawal VD, Chakradhar ST. Combinational ATPG theorems for identifying untestable faults in sequential circuits. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 1995 Sep;14(9):1155-60.
3.Veneris A, Chang R, Abadir MS, Amiri M. Fault equivalence and diagnostic test generation using ATPG. In2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No. 04CH37512) 2004 May 23 (Vol. 5, pp. V-V). IEEE.
4.Jacoby R, Moceyunas P, Cho H, Hachtel G. New ATPG techniques for logic optimization. In1989 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers 1989 Nov 5 (pp. 548-551). IEEE.
5.Liu X, Hsiao MS. A novel transition fault ATPG that reduces yield loss. IEEE Design & Test of Computers. 2005 Nov 21;22(6):576-84.
Downloads
Published
2018-01-23
Issue
Section
Articles
License
Authors need to sign following agreement with International Journal of MC Square Scientific Research before publishing their articles:
- Authors need to return copyright form to Journal Editor-in-chief to proceed their articles for publication. Meantime, the journal licensed under a Creative Commons Attribution License, which permits other user to distribute the work with an acknowledgement of the authors for International Journal of MC Square Scientific Research.
- Authors are also able to share their separate, additional contractual arrangements for the non-restricted contribution of the journal with an acknowledgement of publication in International Journal of MC Square Scientific Research.
- Authors are allowed and encouraged to share their work during the submission process for increasing citation and exploring to increase the paper availability in worldwide way. The Effect of Open Access.
