High-Performance Designs for Linear Algebra Operations on Image Processing

Abstract

Numerical linear algebra operations are key primitives in scientific computing. Performance optimizations of such operations have been extensively investigated. With the rapid advances in technology, hardware acceleration of linear algebra applications using field-programmable gate arrays (FPGAs) has become feasible. In this paper, we propose FPGA-based designs for several basic linear algebra operations, including dot product, matrix-vector multiplication, matrix multiplication, and matrix Factorization. By identifying the parameters for each operation, we analyze the trade-offs and propose a high-performance design. In the implementations of the design a convolution filter using dot product, this is especially useful in noise removal. The proposed designs are implemented on Xilinx FPGAs. Experimental results show that our designs scale with the available hardware resources. Also, the performance of our designs compares favorably with that of general-purpose processor-based designs.